{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/8850101","patent":{"patent_number":"8850101","title":"System And Method To Reduce Memory Access Latencies Using Selective Replication Across Multiple Memory Ports","assignee":"Unknown","inventors":["Jeffrey A. Pangborn","Gregg A. Bouchard","Rajan Goyal","Richard E. Kessler"],"filing_date":null,"publication_date":"2014-09-30T00:00:00.000Z","cpc_codes":[],"num_claims":null,"abstract":null},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"System And Method To Reduce Memory Access Latencies Using Selective Replication Across Multiple Memory Ports","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/8850101","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/8850101","citation_suggestion":"Patentable. \"System And Method To Reduce Memory Access Latencies Using Selective Replication Across Multiple Memory Ports\" (8850101). https://patentable.app/patents/8850101","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/8850101","json":"https://patentable.app/api/llm-context/8850101","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T05:44:44.402Z"}