{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10474543","patent":{"patent_number":"US-10474543","title":"Method and device for economizing computing resources to be used during a process of verification of convolutional parameters using test pattern to enhance fault tolerance and fluctuation robustness in extreme situations","assignee":null,"inventors":[],"filing_date":"2019-01-28T00:00:00.000Z","publication_date":"2019-11-12T00:00:00.000Z","cpc_codes":["G06V","G06F","G06F","G06T","G06T","G06T","G06T","G06V","G06V","G06V","G06T","G06V"],"num_claims":24,"abstract":"A method for economizing computing resources and verifying an integrity of parameters of a neural network by inserting test pattern into a background area of an input image is provided for fault tolerance, fluctuation robustness in extreme situations, functional safety on the neural network, and an annotation cost reduction. The method includes: a computing device (a) generating t-th background prediction information of a t-th image by referring to information on each of a (t−2)-th image and a (t−1)-th image; (b) inserting the test pattern into the t-th image by referring to the t-th background prediction information, to thereby generate an input for verification; (c) generating an output for verification from the input for verification; and (d) determining the integrity of the neural network by referring to the output for verification and an output for reference. According to the method, a data compression and a computation reduction are achieved."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and device for economizing computing resources to be used during a process of verification of convolutional parameters using test pattern to enhance fault tolerance and fluctuation robustness in extreme situations","description":"A method for economizing computing resources and verifying an integrity of parameters of a neural network by inserting test pattern into a background area of an input image is provided for fault toler","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10474543","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10474543","citation_suggestion":"Patentable. \"Method and device for economizing computing resources to be used during a process of verification of convolutional parameters using test pattern to enhance fault tolerance and fluctuation robustness in extreme situations\" (US-10474543). https://patentable.app/patents/US-10474543","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10474543","json":"https://patentable.app/api/llm-context/US-10474543","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T13:24:46.230Z"}