{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10475736","patent":{"patent_number":"US-10475736","title":"Via architecture for increased density interface","assignee":null,"inventors":[],"filing_date":"2017-09-28T00:00:00.000Z","publication_date":"2019-11-12T00:00:00.000Z","cpc_codes":["H01L","G06F","G06F","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","G06F","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":24,"abstract":"Aspects of the embodiments are directed to an IC chip that includes a substrate comprising a first metal layer, a second metal layer, and a ground plane residing on the first metal layer. The second metal layer can include a first signal trace, the first signal trace electrically coupled to a first signal pad residing in the first metal layer by a first signal via. The second metal layer can include a second signal trace, the second signal trace electrically coupled to a second signal pad residing in the first metal layer by a second signal via. The substrate can also include a ground trace residing in the second metal layer between the first signal trace and the second signal trace, the ground trace electrically coupled to the ground plane by a ground via. The vias coupled to the traces can include self-aligned or zero-misaligned vias."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Via architecture for increased density interface","description":"Aspects of the embodiments are directed to an IC chip that includes a substrate comprising a first metal layer, a second metal layer, and a ground plane residing on the first metal layer. The second m","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10475736","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10475736","citation_suggestion":"Patentable. \"Via architecture for increased density interface\" (US-10475736). https://patentable.app/patents/US-10475736","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10475736","json":"https://patentable.app/api/llm-context/US-10475736","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T11:52:27.707Z"}