{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10475852","patent":{"patent_number":"US-10475852","title":"Resistive switching random access memory with asymmetric source and drain","assignee":null,"inventors":[],"filing_date":"2018-10-15T00:00:00.000Z","publication_date":"2019-11-12T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":20,"abstract":"A resistive random access memory (RRAM) structure includes a resistive memory element formed on a semiconductor substrate. The resistive element includes a top electrode, a bottom electrode, and a resistive material layer positioned between the top electrode and the bottom electrode. The RRAM structure further includes a field effect transistor (FET) formed on the semiconductor substrate, the FET having a source and a drain. The drain of the FET has a higher doping concentration than the source of the FET. The resistive memory element is coupled with the drain via a portion of an interconnect structure."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Resistive switching random access memory with asymmetric source and drain","description":"A resistive random access memory (RRAM) structure includes a resistive memory element formed on a semiconductor substrate. The resistive element includes a top electrode, a bottom electrode, and a res","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10475852","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10475852","citation_suggestion":"Patentable. \"Resistive switching random access memory with asymmetric source and drain\" (US-10475852). https://patentable.app/patents/US-10475852","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10475852","json":"https://patentable.app/api/llm-context/US-10475852","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T20:33:26.891Z"}