{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10482929","patent":{"patent_number":"US-10482929","title":"Non-volative (NV) memory (NVM) matrix circuits employing NVM matrix circuits for performing matrix computations","assignee":null,"inventors":[],"filing_date":"2017-11-20T00:00:00.000Z","publication_date":"2019-11-19T00:00:00.000Z","cpc_codes":["G11C","G06N","G06N","G06N","G06N","G11C","G11C","G11C","G11C","G11C","G06N","G11C","G11C","G11C","G11C","G11C"],"num_claims":29,"abstract":"Non-volatile (NV) memory (NVM) matrix circuits employing NVM circuits for performing matrix computations are disclosed. In exemplary aspects disclosed herein, an NVM matrix circuit is provided that has a plurality of NVM storage string circuits each comprising a plurality of NVM bit cell circuits each configured to store a memory state. Each NVM bit cell circuit has a stored memory state represented by a resistance, and includes a transistor whose gate node is coupled to a word line among a plurality of word lines configured to receive an input vector of 1×m size for example. Activation of the gate of a given NVM bit cell circuit controls whether its resistance is contributed to a respective source line. This causes a summation current to be generated on each source line based on the weighted summed contribution of each NVM bit cell circuit's resistance to its respective source line."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Non-volative (NV) memory (NVM) matrix circuits employing NVM matrix circuits for performing matrix computations","description":"Non-volatile (NV) memory (NVM) matrix circuits employing NVM circuits for performing matrix computations are disclosed. In exemplary aspects disclosed herein, an NVM matrix circuit is provided that ha","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10482929","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10482929","citation_suggestion":"Patentable. \"Non-volative (NV) memory (NVM) matrix circuits employing NVM matrix circuits for performing matrix computations\" (US-10482929). https://patentable.app/patents/US-10482929","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10482929","json":"https://patentable.app/api/llm-context/US-10482929","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T12:45:12.852Z"}