{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10482943","patent":{"patent_number":"US-10482943","title":"Systems and methods for improved error correction in a refreshable memory","assignee":null,"inventors":[],"filing_date":"2017-06-28T00:00:00.000Z","publication_date":"2019-11-19T00:00:00.000Z","cpc_codes":["G11C","G06F","G06F","G11C","G11C"],"num_claims":29,"abstract":"Systems and methods are disclosed for error correction control (ECC) for a refreshable memory device coupled to a system on a chip SoC. The memory device including a parity region and a user data region. A method includes determining with the SoC a first refresh rate for the user data region of the memory device and a second refresh rate for the parity region of the memory device, where the second refresh rate is different than the first refresh rate. Parity data is generated for a write operation of a user payload data (UPD) to the user data region of the memory device. The user data region of the memory device is refreshed at the first refresh rate and the parity region is refreshed at the second refresh rate."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Systems and methods for improved error correction in a refreshable memory","description":"Systems and methods are disclosed for error correction control (ECC) for a refreshable memory device coupled to a system on a chip SoC. The memory device including a parity region and a user data regi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10482943","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10482943","citation_suggestion":"Patentable. \"Systems and methods for improved error correction in a refreshable memory\" (US-10482943). https://patentable.app/patents/US-10482943","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10482943","json":"https://patentable.app/api/llm-context/US-10482943","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:36:14.764Z"}