{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10483152","patent":{"patent_number":"US-10483152","title":"High resistivity semiconductor-on-insulator wafer and a method of manufacturing","assignee":null,"inventors":[],"filing_date":"2015-11-16T00:00:00.000Z","publication_date":"2019-11-19T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":28,"abstract":"A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comprising silicon, germanium, or silicon germanium, an optional polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"High resistivity semiconductor-on-insulator wafer and a method of manufacturing","description":"A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comp","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10483152","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10483152","citation_suggestion":"Patentable. \"High resistivity semiconductor-on-insulator wafer and a method of manufacturing\" (US-10483152). https://patentable.app/patents/US-10483152","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10483152","json":"https://patentable.app/api/llm-context/US-10483152","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T00:15:35.476Z"}