{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10483167","patent":{"patent_number":"US-10483167","title":"Method for manufacturing dual FinFET device","assignee":null,"inventors":[],"filing_date":"2017-08-15T00:00:00.000Z","publication_date":"2019-11-19T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L"],"num_claims":20,"abstract":"In a method for manufacturing a semiconductor device, a substrate is provided. A hard mask and a mask layer are formed on a first region and a second region of the substrate. The substrate is recessed using the hard mask and the mask layer to form a fin structure in the first region and a raised structure in the second region. First isolation structures and second isolation structures are formed on lower portions of opposite sidewalls of the fin structure and opposite sidewalls of the raised structure. A first gate structure is formed on a portion of the fin structure, and a second gate structure is formed on a portion of the raised structure. A first source and a first drain are formed on opposite sides of the first gate structure, and a second source and a second drain are formed on opposite sides of the second gate structure."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method for manufacturing dual FinFET device","description":"In a method for manufacturing a semiconductor device, a substrate is provided. A hard mask and a mask layer are formed on a first region and a second region of the substrate. The substrate is recessed","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10483167","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10483167","citation_suggestion":"Patentable. \"Method for manufacturing dual FinFET device\" (US-10483167). https://patentable.app/patents/US-10483167","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10483167","json":"https://patentable.app/api/llm-context/US-10483167","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T08:38:25.083Z"}