{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10483261","patent":{"patent_number":"US-10483261","title":"Integrated circuit having chemically modified spacer surface","assignee":null,"inventors":[],"filing_date":"2017-03-02T00:00:00.000Z","publication_date":"2019-11-19T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L"],"num_claims":15,"abstract":"A method of fabricating an integrated circuit includes depositing a first dielectric material onto a semiconductor surface of a substrate having a gate stack thereon including a gate electrode on a gate dielectric. The first dielectric material is etched to form sidewall spacers on sidewalls of the gate stack. A top surface of the first dielectric material is chemically converted to a second dielectric material by adding at least one element to provide surface converted sidewall spacers. The second dielectric material is chemically bonded across a transition region to the first dielectric material."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integrated circuit having chemically modified spacer surface","description":"A method of fabricating an integrated circuit includes depositing a first dielectric material onto a semiconductor surface of a substrate having a gate stack thereon including a gate electrode on a ga","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10483261","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10483261","citation_suggestion":"Patentable. \"Integrated circuit having chemically modified spacer surface\" (US-10483261). https://patentable.app/patents/US-10483261","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10483261","json":"https://patentable.app/api/llm-context/US-10483261","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T05:13:31.016Z"}