{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10483280","patent":{"patent_number":"US-10483280","title":"Method of forming staircase structures for three-dimensional memory device double-sided routing","assignee":null,"inventors":[],"filing_date":"2018-09-22T00:00:00.000Z","publication_date":"2019-11-19T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":20,"abstract":"Embodiments of methods for forming staircase structures for three-dimensional (3D) memory devices double-sided routing are disclosed. In an example, a first dielectric layer is formed on a substrate, and a first photoresist layer is formed on the first dielectric layer. A recess is patterned through the first dielectric layer to the substrate by cycles of trim-etch the first dielectric layer. A plurality of dielectric/sacrificial layer pairs filling in the recess are formed. A second photoresist layer is formed on a top surface of the dielectric/sacrificial layer pairs. The dielectric/sacrificial layer pairs are patterned by cycles of trim-etch the dielectric/sacrificial layer pairs. A second dielectric layer covering the patterned dielectric/sacrificial layer pairs is formed. A memory stack on the substrate including a plurality of conductor/dielectric layer pairs is formed by replacing, with a plurality of conductor layers, the sacrificial layers in the patterned dielectric/sacrificial layer pairs."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method of forming staircase structures for three-dimensional memory device double-sided routing","description":"Embodiments of methods for forming staircase structures for three-dimensional (3D) memory devices double-sided routing are disclosed. In an example, a first dielectric layer is formed on a substrate, ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10483280","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10483280","citation_suggestion":"Patentable. \"Method of forming staircase structures for three-dimensional memory device double-sided routing\" (US-10483280). https://patentable.app/patents/US-10483280","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10483280","json":"https://patentable.app/api/llm-context/US-10483280","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T04:21:07.247Z"}