{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10489536","patent":{"patent_number":"US-10489536","title":"Method and apparatus for modeling delays in emulation","assignee":null,"inventors":[],"filing_date":"2018-05-14T00:00:00.000Z","publication_date":"2019-11-26T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":18,"abstract":"A hardware verification system according to one embodiment includes, in part, a plurality of programmable devices. The plurality of programmable devices include a master scheduler, a plurality of schedulers and a plurality of programmable delay elements. A first one of the plurality of schedulers is configured to receive one or more delay values associated with one or more of the plurality of delay elements. Each of the plurality of programmable delay elements corresponds to a delay. The first scheduler is further configured to send a parameter corresponding to the one or more delay values to the master scheduler, and generate one or more signals corresponding to the one or more delay elements in response to a control signal the first scheduler receives from the master scheduler."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and apparatus for modeling delays in emulation","description":"A hardware verification system according to one embodiment includes, in part, a plurality of programmable devices. The plurality of programmable devices include a master scheduler, a plurality of sche","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10489536","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10489536","citation_suggestion":"Patentable. \"Method and apparatus for modeling delays in emulation\" (US-10489536). https://patentable.app/patents/US-10489536","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10489536","json":"https://patentable.app/api/llm-context/US-10489536","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T17:20:28.898Z"}