{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10491342","patent":{"patent_number":"US-10491342","title":"Bit error ratio tests with two-sided bit error ratio frequentist intervals","assignee":null,"inventors":[],"filing_date":"2018-07-23T00:00:00.000Z","publication_date":"2019-11-26T00:00:00.000Z","cpc_codes":["H04L","H04L","H04J"],"num_claims":20,"abstract":"An example communications device may include a slicer that may generate a digital output signal by thresholding a received signal according to variably set timing and voltage parameters. Testing circuitry may determine expected bit error ratios for multiple time-voltage slicer by performing test operations corresponding respectively to the multiple time-voltage slices. Each of the test operations may include setting the timing and voltage parameters of the slicer based on the corresponding time-voltage slice, periodically measuring a number of total bits and a number of erroneous bits based on the digital output signal and calculating a two-sided bit error ratio frequentist confidence interval (FCI) size from the measured bit error ratio. The measured bit error ratio is output in response to the two-sided bit error ratio FCI being less than or equal to a two-sided bit error ratio interval target size."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Bit error ratio tests with two-sided bit error ratio frequentist intervals","description":"An example communications device may include a slicer that may generate a digital output signal by thresholding a received signal according to variably set timing and voltage parameters. Testing circu","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10491342","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10491342","citation_suggestion":"Patentable. \"Bit error ratio tests with two-sided bit error ratio frequentist intervals\" (US-10491342). https://patentable.app/patents/US-10491342","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10491342","json":"https://patentable.app/api/llm-context/US-10491342","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:46:51.767Z"}