{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10496564","patent":{"patent_number":"US-10496564","title":"Bus control circuit, information processing apparatus, and control method for bus control circuit","assignee":null,"inventors":[],"filing_date":"2018-01-25T00:00:00.000Z","publication_date":"2019-12-03T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":19,"abstract":"A bus control circuit includes: a plurality of queues that each include a plurality of entries for storing data, a first read pointer, and a check pointer set to indicate a same entry as an entry indicated by the first read pointer, and each store data on a First in, First out basis; a plurality of first arbitration circuits that receive, in a divided manner, arbitration participation signals from the plurality of queues, each arbitrate the received plurality of arbitration participation signals, and each output one of the plurality of arbitration participation signals; a plurality of buffers that each store, on the First in, First out basis, the arbitration participation signals output from the respective first arbitration circuits; and a second arbitration circuit that arbitrates the arbitration participation signals output from the plurality of buffers and outputs an arbitration result signal corresponding to one of the plurality of queues."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Bus control circuit, information processing apparatus, and control method for bus control circuit","description":"A bus control circuit includes: a plurality of queues that each include a plurality of entries for storing data, a first read pointer, and a check pointer set to indicate a same entry as an entry indi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10496564","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10496564","citation_suggestion":"Patentable. \"Bus control circuit, information processing apparatus, and control method for bus control circuit\" (US-10496564). https://patentable.app/patents/US-10496564","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10496564","json":"https://patentable.app/api/llm-context/US-10496564","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T02:44:48.703Z"}