{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10497294","patent":{"patent_number":"US-10497294","title":"Array test circuit","assignee":null,"inventors":[],"filing_date":"2017-10-19T00:00:00.000Z","publication_date":"2019-12-03T00:00:00.000Z","cpc_codes":["G09G","G09G"],"num_claims":12,"abstract":"An array test circuit is provided. The circuit includes: at least one first demultiplexer module, an enable signal input point, a plurality of measurement and control signal input points, a plurality of data lines, a plurality of enabling switches, a plurality of anti-floating switches, and an inverter. A control terminal of each anti-floating switch is electrically connecting to an inverted enable signal, an input terminal is accessed to an OFF signal of the measurement and control switch, an output terminal is electrically connected to a corresponding measurement and control signal input point. The anti-floating switch can be turned on and input the OFF signal to the measurement and control signal input point when the liquid crystal panel is displayed, it can ensure the demultiplexing switches are kept in OFF state, preventing the switches in floating state and improving the working stability of the liquid crystal display panel."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Array test circuit","description":"An array test circuit is provided. The circuit includes: at least one first demultiplexer module, an enable signal input point, a plurality of measurement and control signal input points, a plurality ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10497294","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10497294","citation_suggestion":"Patentable. \"Array test circuit\" (US-10497294). https://patentable.app/patents/US-10497294","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10497294","json":"https://patentable.app/api/llm-context/US-10497294","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T07:47:10.910Z"}