{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10497660","patent":{"patent_number":"US-10497660","title":"Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices","assignee":null,"inventors":[],"filing_date":"2015-02-26T00:00:00.000Z","publication_date":"2019-12-03T00:00:00.000Z","cpc_codes":["H01L","G06F","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices are disclosed. In some embodiments, an interconnect structure includes dielectric layers, a conductive layer disposed in the dielectric layers, and a via layer disposed in the dielectric layers proximate the conductive layer. An underball metallization (UBM) layer is disposed in the dielectric layers proximate the via layer. A first connector coupling region is disposed in the via layer and the UBM layer. A via layer portion of the first connector coupling region is coupled to a first contact pad in the conductive layer. A second connector coupling region is disposed in the UBM layer. The second connector coupling region is coupled to a conductive segment in the UBM layer and the via layer. The second connector coupling region is coupled to a second contact pad in the conductive layer by the conductive segment."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices","description":"Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices are disclosed. In some embodiments, an interconnect structure includes dielectric layers, a cond","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10497660","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10497660","citation_suggestion":"Patentable. \"Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices\" (US-10497660). https://patentable.app/patents/US-10497660","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10497660","json":"https://patentable.app/api/llm-context/US-10497660","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T10:35:16.017Z"}