{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10503585","patent":{"patent_number":"US-10503585","title":"Memory system","assignee":null,"inventors":[],"filing_date":"2018-08-28T00:00:00.000Z","publication_date":"2019-12-10T00:00:00.000Z","cpc_codes":["G06F","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"A memory system includes a semiconductor memory and a memory controller. The semiconductor memory includes first memory cells, first bit lines connected to the first memory cells, second memory cells, second bit lines connected to the second memory cells, a word line connected to the first and second memory cells, and a driver configured to apply a voltage to the word line. In response to a special read command from the memory controller, the driver sequentially applies, to the word line, first read voltages to read data from the first memory cells, a second read voltage within a voltage range of the first read voltages to read data from the first memory cells, third read voltages to read data from the second memory cells, and a fourth read voltage within a voltage range of the third read voltages to read data from the second memory cells."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory system","description":"A memory system includes a semiconductor memory and a memory controller. The semiconductor memory includes first memory cells, first bit lines connected to the first memory cells, second memory cells,","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10503585","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10503585","citation_suggestion":"Patentable. \"Memory system\" (US-10503585). https://patentable.app/patents/US-10503585","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10503585","json":"https://patentable.app/api/llm-context/US-10503585","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T13:41:46.318Z"}