{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10504889","patent":{"patent_number":"US-10504889","title":"Integrating a junction field effect transistor into a vertical field effect transistor","assignee":null,"inventors":[],"filing_date":"2018-07-17T00:00:00.000Z","publication_date":"2019-12-10T00:00:00.000Z","cpc_codes":["B82Y","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":10,"abstract":"Embodiments of the invention include first and second devices formed on a substrate. The first device includes a bottom source or drain (S/D) region, a plurality of fins formed on portions of the bottom S/D region, a bottom spacer formed on the bottom S/D region, a dielectric layer, a gate, a top S/D region formed on each fin of a plurality of fins, and one or more contacts. The dielectric layer is disposed between the gate and the fin of the plurality of fins. The second device includes a bottom doped region, a channel formed the bottom doped region, a sidewall doped region of the channel, a gate coupled to the sidewall doped region, a top doped region, and one or more contacts. A junction is formed between the channel and the sidewall doped region. The cap layer is formed on the gate and the top doped region."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integrating a junction field effect transistor into a vertical field effect transistor","description":"Embodiments of the invention include first and second devices formed on a substrate. The first device includes a bottom source or drain (S/D) region, a plurality of fins formed on portions of the bott","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10504889","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10504889","citation_suggestion":"Patentable. \"Integrating a junction field effect transistor into a vertical field effect transistor\" (US-10504889). https://patentable.app/patents/US-10504889","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10504889","json":"https://patentable.app/api/llm-context/US-10504889","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T20:11:09.942Z"}