{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10509760","patent":{"patent_number":"US-10509760","title":"Buffer controller, memory device, and integrated circuit device","assignee":null,"inventors":[],"filing_date":"2017-12-27T00:00:00.000Z","publication_date":"2019-12-17T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G06F","G11C","G11C"],"num_claims":20,"abstract":"A buffer controller includes a pointer generator, a code converter, a synchronizer, a code restorer, and a comparator. The pointer generator operates according to a first clock signal, and generates a first pointer by encoding a first address of a buffer with a first code. The code converter generates a first transmission pointer by converting the first pointer with a second code or a third code according to an amount of data stored in or read from the first address. The synchronizer synchronizes the first transmission pointer with a second clock signal. The code restorer generates a first comparison pointer by restoring the first transmission pointer, synchronized with the second clock signal, with the first code. The comparator compares the first comparison pointer with a second pointer. The second pointer defines a second address of the buffer with the first code."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Buffer controller, memory device, and integrated circuit device","description":"A buffer controller includes a pointer generator, a code converter, a synchronizer, a code restorer, and a comparator. The pointer generator operates according to a first clock signal, and generates a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10509760","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10509760","citation_suggestion":"Patentable. \"Buffer controller, memory device, and integrated circuit device\" (US-10509760). https://patentable.app/patents/US-10509760","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10509760","json":"https://patentable.app/api/llm-context/US-10509760","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T14:09:27.982Z"}