{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10510623","patent":{"patent_number":"US-10510623","title":"Overlay error and process window metrology","assignee":null,"inventors":[],"filing_date":"2017-12-27T00:00:00.000Z","publication_date":"2019-12-17T00:00:00.000Z","cpc_codes":["H01L","G01N","G01N","G01N","G06T","G06T","H01L","G01N","G06T","G06T","H01L"],"num_claims":20,"abstract":"A method for inline inspection during semiconductor wafer fabrication is provided. The method includes forming a plurality of test structures on a semiconductor wafer along two opposite directions. An offset distance between a sample feature and a target feature of each of the test structures increases gradually along the two opposite directions. The method further includes producing an image of the test structures. The method also includes performing image analysis of the image to recognize a position with an extreme of a gray level. In addition, the method includes calculating an overlay error according to the recognized position."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Overlay error and process window metrology","description":"A method for inline inspection during semiconductor wafer fabrication is provided. The method includes forming a plurality of test structures on a semiconductor wafer along two opposite directions. An","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10510623","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10510623","citation_suggestion":"Patentable. \"Overlay error and process window metrology\" (US-10510623). https://patentable.app/patents/US-10510623","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10510623","json":"https://patentable.app/api/llm-context/US-10510623","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:52:24.259Z"}