{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10510718","patent":{"patent_number":"US-10510718","title":"Semiconductor structure and manufacturing method thereof","assignee":null,"inventors":[],"filing_date":"2017-08-28T00:00:00.000Z","publication_date":"2019-12-17T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A semiconductor structure includes a substrate; a first die disposed over the substrate; a second die disposed over the substrate; a molding disposed over the substrate and surrounding the first die and the second die; an interconnect structure including a dielectric layer and a conductive member, wherein the dielectric layer is disposed over the first die, the second die and the molding, and the conductive member is surrounded by the dielectric layer; and a via extended within the second die and between the dielectric layer and the substrate."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor structure and manufacturing method thereof","description":"A semiconductor structure includes a substrate; a first die disposed over the substrate; a second die disposed over the substrate; a molding disposed over the substrate and surrounding the first die a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10510718","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10510718","citation_suggestion":"Patentable. \"Semiconductor structure and manufacturing method thereof\" (US-10510718). https://patentable.app/patents/US-10510718","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10510718","json":"https://patentable.app/api/llm-context/US-10510718","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:31:34.484Z"}