{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10514867","patent":{"patent_number":"US-10514867","title":"System and methodology that facilitates error management within a shared non-volatile memory architecture","assignee":null,"inventors":[],"filing_date":"2016-12-30T00:00:00.000Z","publication_date":"2019-12-24T00:00:00.000Z","cpc_codes":["G06F","G06F","G11C","G11C"],"num_claims":22,"abstract":"Various aspects directed towards facilitating error management within a shared non-volatile memory (NVM) architecture are disclosed. Data programmed into a plurality NVM cells is encoded prior to programming, and a range of programmability associated with each of the plurality of NVM cells is determined when the plurality of NVM cells are programmed A first error management scheme is then applied to NVM cells identified as limited-range programmable cells, and a second error management scheme is applied to NVM cells identified as full-range programmable cells, such that the second error management scheme is different than the first error management scheme."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"System and methodology that facilitates error management within a shared non-volatile memory architecture","description":"Various aspects directed towards facilitating error management within a shared non-volatile memory (NVM) architecture are disclosed. Data programmed into a plurality NVM cells is encoded prior to prog","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10514867","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10514867","citation_suggestion":"Patentable. \"System and methodology that facilitates error management within a shared non-volatile memory architecture\" (US-10514867). https://patentable.app/patents/US-10514867","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10514867","json":"https://patentable.app/api/llm-context/US-10514867","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:08:07.013Z"}