{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10515689","patent":{"patent_number":"US-10515689","title":"Memory circuit configuration and method","assignee":null,"inventors":[],"filing_date":"2018-03-20T00:00:00.000Z","publication_date":"2019-12-24T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"A circuit includes a data line, a first cell in a first row of a memory array, and a second cell in a second row of the memory array. The first cell is electrically coupled with the data line and the second cell is electrically coupled with the data line. The circuit is configured to simultaneously transfer data from the first cell and the second cell to the data line in a first read operation on the first row."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory circuit configuration and method","description":"A circuit includes a data line, a first cell in a first row of a memory array, and a second cell in a second row of the memory array. The first cell is electrically coupled with the data line and the ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10515689","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10515689","citation_suggestion":"Patentable. \"Memory circuit configuration and method\" (US-10515689). https://patentable.app/patents/US-10515689","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10515689","json":"https://patentable.app/api/llm-context/US-10515689","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T13:23:19.999Z"}