{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10515827","patent":{"patent_number":"US-10515827","title":"Method for forming chip package with recessed interposer substrate","assignee":null,"inventors":[],"filing_date":"2018-01-18T00:00:00.000Z","publication_date":"2019-12-24T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A method for forming a chip package is provided. The method includes disposing a chip over a redistribution structure. The redistribution structure includes a first insulating layer and a first wiring layer, and the first wiring layer is in the first insulating layer and electrically connected to the chip. The method includes bonding an interposer substrate to the redistribution structure through a conductive structure. The chip is between the interposer substrate and the redistribution structure. The interposer substrate has a recess adjacent to the redistribution structure. A first portion of the chip is in the recess. The interposer substrate includes a substrate and a conductive via structure, and the conductive via structure passes through the substrate and is electrically connected to the first wiring layer through the conductive structure."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method for forming chip package with recessed interposer substrate","description":"A method for forming a chip package is provided. The method includes disposing a chip over a redistribution structure. The redistribution structure includes a first insulating layer and a first wiring","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10515827","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10515827","citation_suggestion":"Patentable. \"Method for forming chip package with recessed interposer substrate\" (US-10515827). https://patentable.app/patents/US-10515827","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10515827","json":"https://patentable.app/api/llm-context/US-10515827","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T06:23:49.482Z"}