{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10521157","patent":{"patent_number":"US-10521157","title":"Jump page cache read method in NAND flash memory and NAND flash memory","assignee":null,"inventors":[],"filing_date":"2018-01-15T00:00:00.000Z","publication_date":"2019-12-31T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":10,"abstract":"A NAND flash memory including a control unit which includes a signal receiving circuit and a flash array; the signal receiving circuit is used to receive a cache read command from an external NAND controller; the flash array includes at least one chip, each chip includes at least one plane, each plane includes a plurality of blocks, each block includes a plurality of pages; when a cache read command is received, it reads pages in a first block according to an address of the page until reaching the last page in the first block; when the last page in the first block is reached, an address of a next to-be-read page is generated according to an address of the last page in the first block to allow the cache read command to read the next to-be-read page."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Jump page cache read method in NAND flash memory and NAND flash memory","description":"A NAND flash memory including a control unit which includes a signal receiving circuit and a flash array; the signal receiving circuit is used to receive a cache read command from an external NAND con","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10521157","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10521157","citation_suggestion":"Patentable. \"Jump page cache read method in NAND flash memory and NAND flash memory\" (US-10521157). https://patentable.app/patents/US-10521157","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10521157","json":"https://patentable.app/api/llm-context/US-10521157","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T08:43:55.860Z"}