{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10521538","patent":{"patent_number":"US-10521538","title":"Method and system for integrated circuit design with on-chip variation and spatial correlation","assignee":null,"inventors":[],"filing_date":"2016-10-26T00:00:00.000Z","publication_date":"2019-12-31T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"An integrated circuit (IC) design method includes receiving a spatial correlation matrix, R, of certain property of post-fabrication IC devices; and deriving a random number generation function g(x, y) such that random numbers for a device at a coordinate (x, y) can be generated by g(x, y) independent of other devices, and all pairs of random numbers satisfy the spatial correlation matrix R. The method further includes receiving an IC design layout having pre-fabrication IC devices, each of the pre-fabrication IC devices having a coordinate and a first value of the property. The method further includes generating random numbers using the coordinates of the pre-fabrication IC devices and the function g(x, y); deriving second values of the property by applying the random numbers to the first values; and providing the second values to an IC simulation tool."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and system for integrated circuit design with on-chip variation and spatial correlation","description":"An integrated circuit (IC) design method includes receiving a spatial correlation matrix, R, of certain property of post-fabrication IC devices; and deriving a random number generation function g(x, y","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10521538","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10521538","citation_suggestion":"Patentable. \"Method and system for integrated circuit design with on-chip variation and spatial correlation\" (US-10521538). https://patentable.app/patents/US-10521538","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10521538","json":"https://patentable.app/api/llm-context/US-10521538","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T16:25:47.953Z"}