{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10522516","patent":{"patent_number":"US-10522516","title":"Stacking integrated circuits containing serializer and deserializer blocks using through silicon via","assignee":null,"inventors":[],"filing_date":"2019-03-16T00:00:00.000Z","publication_date":"2019-12-31T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":2,"abstract":"A system comprising a die stack having at least a first die and a second die; one or more Redistribution Layer(s); one or more Through Silicon Via(s); one or more Serial I/O(s); one or more contact pad(s); and a substrate. The die stack is configured to communicate through said one or more Redistribution Layer(s) and said Through Silicon Via(s). The first die and/or said second die is/are configured to communicate through said one or more Redistribution Layer(s) and said Through Silicon Via(s). The one or more Serial I/O(s) is/are configured to communicate through said one or more Redistribution Layer(s) and said Through Silicon Via(s)."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Stacking integrated circuits containing serializer and deserializer blocks using through silicon via","description":"A system comprising a die stack having at least a first die and a second die; one or more Redistribution Layer(s); one or more Through Silicon Via(s); one or more Serial I/O(s); one or more contact pa","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10522516","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10522516","citation_suggestion":"Patentable. \"Stacking integrated circuits containing serializer and deserializer blocks using through silicon via\" (US-10522516). https://patentable.app/patents/US-10522516","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10522516","json":"https://patentable.app/api/llm-context/US-10522516","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:15:00.450Z"}