{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10522528","patent":{"patent_number":"US-10522528","title":"Semiconductor device layout","assignee":null,"inventors":[],"filing_date":"2017-09-28T00:00:00.000Z","publication_date":"2019-12-31T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":20,"abstract":"Semiconductor devices and semiconductor cell arrays are provided herein. In some examples, a semiconductor device includes a multi-fin active region, a mono-fin active region, and an isolation feature between the multi-fin active region and the mono-fin active region. The multi-fin active region includes a first plurality of fins, a second plurality of fins parallel to the first plurality of fins, a first n-type field effect transistor (FET), and a first p-type FET. The mono-fin active region abuts the multi-fin active region. The mono-fin active region includes a first fin, a second fin different from the first fin, a second n-type FET, and a second p-type FET. The isolation feature is parallel to the first and second gate structures."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor device layout","description":"Semiconductor devices and semiconductor cell arrays are provided herein. In some examples, a semiconductor device includes a multi-fin active region, a mono-fin active region, and an isolation feature","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10522528","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10522528","citation_suggestion":"Patentable. \"Semiconductor device layout\" (US-10522528). https://patentable.app/patents/US-10522528","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10522528","json":"https://patentable.app/api/llm-context/US-10522528","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T10:34:28.049Z"}