{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10522554","patent":{"patent_number":"US-10522554","title":"SRAM cells with vertical gate-all-around MOSFETs","assignee":null,"inventors":[],"filing_date":"2018-12-10T00:00:00.000Z","publication_date":"2019-12-31T00:00:00.000Z","cpc_codes":["H01L","G11C","H01L"],"num_claims":20,"abstract":"A Static Random Access Memory (SRAM) cell includes a first and a second pull-up transistor, a first and a second pull-down transistor forming cross-latched inverters with the first and the second pull-up transistors, and a first and a second pass-gate transistor. Each of the first and the second pull-up transistors, the first and the second pull-down transistors, and the first and the second pass-gate transistors includes a bottom plate as a first source/drain region, a channel over the bottom plate, and a top plate as a second source/drain region. A first isolated active region is in the SRAM cell and acts as the bottom plate of the first pull-down transistor and the bottom plate of the first pass-gate transistor. A second isolated active region is in the SRAM cell and acts as the bottom plate of the second pull-down transistor and the bottom plate of the second pass-gate transistor."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"SRAM cells with vertical gate-all-around MOSFETs","description":"A Static Random Access Memory (SRAM) cell includes a first and a second pull-up transistor, a first and a second pull-down transistor forming cross-latched inverters with the first and the second pull","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10522554","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10522554","citation_suggestion":"Patentable. \"SRAM cells with vertical gate-all-around MOSFETs\" (US-10522554). https://patentable.app/patents/US-10522554","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10522554","json":"https://patentable.app/api/llm-context/US-10522554","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T17:19:13.581Z"}