{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10522594","patent":{"patent_number":"US-10522594","title":"Resistive memory with a plurality of resistive random access memory cells each comprising a transistor and a resistive element","assignee":null,"inventors":[],"filing_date":"2019-02-05T00:00:00.000Z","publication_date":"2019-12-31T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":17,"abstract":"A method of forming a semiconductor structure includes forming a plurality of vertical field-effect transistors (VFETs) disposed on a substrate and forming a plurality of resistive elements disposed over top surfaces of the VFETs. Each pair of a given one of the plurality of VFETs and a corresponding resistive element disposed over the given VFET provides a resistive random access memory (ReRAM) cell. The VFETs are arranged in two or more columns and two or more rows, wherein each column of VFETs provides a bitline of the ReRAM cells sharing a bottom source/drain region and wherein each row of VFETs provides a wordline of the ReRAM cells sharing a gate. Top source/drain regions of the VFETs provide bottom contacts for the resistive elements disposed over the VFETs."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Resistive memory with a plurality of resistive random access memory cells each comprising a transistor and a resistive element","description":"A method of forming a semiconductor structure includes forming a plurality of vertical field-effect transistors (VFETs) disposed on a substrate and forming a plurality of resistive elements disposed o","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10522594","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10522594","citation_suggestion":"Patentable. \"Resistive memory with a plurality of resistive random access memory cells each comprising a transistor and a resistive element\" (US-10522594). https://patentable.app/patents/US-10522594","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10522594","json":"https://patentable.app/api/llm-context/US-10522594","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T08:44:05.441Z"}