{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10528288","patent":{"patent_number":"US-10528288","title":"Three-dimensional stacked memory access optimization","assignee":null,"inventors":[],"filing_date":"2017-12-20T00:00:00.000Z","publication_date":"2020-01-07T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":17,"abstract":"An aspect includes receiving a request to access one or more memory devices in a stack of memory devices in a memory. Each of the memory devices are communicatively coupled to at least one other of the memory devices in the stack via a through silicon via (TSV). A current operating mode of the memory is determined in response to receiving the request. Based at least in part on the current operating mode of the memory being a first mode, a chip select switch is activated to provide access to exactly one of the memory devices in the stack of memory devices. Based at least in part on the current operating mode of the memory being a second mode, the chip select switch is activated to access all of the memory devices in the stack in parallel. The request is serviced using the activated chip select switch."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Three-dimensional stacked memory access optimization","description":"An aspect includes receiving a request to access one or more memory devices in a stack of memory devices in a memory. Each of the memory devices are communicatively coupled to at least one other of th","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10528288","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10528288","citation_suggestion":"Patentable. \"Three-dimensional stacked memory access optimization\" (US-10528288). https://patentable.app/patents/US-10528288","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10528288","json":"https://patentable.app/api/llm-context/US-10528288","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T21:00:09.443Z"}