{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10528353","patent":{"patent_number":"US-10528353","title":"Generating a mask vector for determining a processor instruction address using an instruction tag in a multi-slice processor","assignee":null,"inventors":[],"filing_date":"2016-05-24T00:00:00.000Z","publication_date":"2020-01-07T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":17,"abstract":"Methods and apparatus for generating a mask vector for determining a processor instruction address using an instruction tag (ITAG) in a multi-slice processor including receiving a first ITAG value and an interrupt ITAG value; generating the mask vector divided into mask sections comprising a plurality of elements with unset flags; for each mask section: if the mask section comprises the first ITAG value, setting a flag of an element in the mask section corresponding to the first ITAG value; if the mask section comprises the interrupt ITAG value, setting a flag of an element in the mask section corresponding to the interrupt ITAG value; setting each flag of each element in the mask vector between the element in the mask vector corresponding to the first ITAG value and the element in the mask vector corresponding to the interrupt ITAG value; and providing the mask vector to an instruction fetch unit."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Generating a mask vector for determining a processor instruction address using an instruction tag in a multi-slice processor","description":"Methods and apparatus for generating a mask vector for determining a processor instruction address using an instruction tag (ITAG) in a multi-slice processor including receiving a first ITAG value and","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10528353","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10528353","citation_suggestion":"Patentable. \"Generating a mask vector for determining a processor instruction address using an instruction tag in a multi-slice processor\" (US-10528353). https://patentable.app/patents/US-10528353","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10528353","json":"https://patentable.app/api/llm-context/US-10528353","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T12:20:09.725Z"}