{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10529480","patent":{"patent_number":"US-10529480","title":"Asymmetrical T-coil design for high-speed transmitter IO ESD circuit applications","assignee":null,"inventors":[],"filing_date":"2017-09-01T00:00:00.000Z","publication_date":"2020-01-07T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":30,"abstract":"For a T-coil IC, a first inductor core is on an Mx layer, has at least 1⅜ turns, and has a first-inductor-core-first end and a first-inductor-core-second end. A second inductor core is on an Mx-1 layer, has at least 2⅝ turns, and has a second-inductor-core-first end and a second-inductor-core-second end. The first-inductor-core-second end is connected to the second-inductor-core-first end at a node. A third inductor core is on an Mx-2 layer and has at least 3 turns. The third inductor core has a third-inductor-core-first end and a third-inductor-core-second end. The second-inductor-core-second end is connected to the third-inductor-core-first end. A tap is on an Mx-3-y layer, where y≥0. The tap is connected to the first and second inductor cores at the node. A first inductor is formed by the first inductor core, and a second inductor is formed by the second and third inductor cores."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Asymmetrical T-coil design for high-speed transmitter IO ESD circuit applications","description":"For a T-coil IC, a first inductor core is on an Mx layer, has at least 1⅜ turns, and has a first-inductor-core-first end and a first-inductor-core-second end. A second inductor core is on an Mx-1 laye","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10529480","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10529480","citation_suggestion":"Patentable. \"Asymmetrical T-coil design for high-speed transmitter IO ESD circuit applications\" (US-10529480). https://patentable.app/patents/US-10529480","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10529480","json":"https://patentable.app/api/llm-context/US-10529480","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T10:18:19.342Z"}