{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10530560","patent":{"patent_number":"US-10530560","title":"Integrated circuit and method for processing synchronized network frames using a hardware synchronization circuit","assignee":null,"inventors":[],"filing_date":"2016-06-20T00:00:00.000Z","publication_date":"2020-01-07T00:00:00.000Z","cpc_codes":["H04L","G06F","H04J","H04L"],"num_claims":17,"abstract":"In an embodiment, an integrated circuit (IC) device is disclosed. In the embodiment, the IC device includes an Ethernet frame processor, at least one Ethernet port coupled to the Ethernet frame processor, and a hardware synchronization circuit coupled to the Ethernet frame processor and to the at least one Ethernet port, the hardware synchronization circuit including a controller, a local clock, a media-independent peripheral coupled to the controller, and a media-dependent peripheral coupled to the media-independent peripheral, wherein power can be provided to the hardware synchronization circuit independent of the Ethernet frame processor."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integrated circuit and method for processing synchronized network frames using a hardware synchronization circuit","description":"In an embodiment, an integrated circuit (IC) device is disclosed. In the embodiment, the IC device includes an Ethernet frame processor, at least one Ethernet port coupled to the Ethernet frame proces","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10530560","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10530560","citation_suggestion":"Patentable. \"Integrated circuit and method for processing synchronized network frames using a hardware synchronization circuit\" (US-10530560). https://patentable.app/patents/US-10530560","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10530560","json":"https://patentable.app/api/llm-context/US-10530560","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T11:55:31.571Z"}