{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10534705","patent":{"patent_number":"US-10534705","title":"Memory system for scheduling foreground and background operations, and operating method thereof","assignee":null,"inventors":[],"filing_date":"2018-03-05T00:00:00.000Z","publication_date":"2020-01-14T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"A memory system includes: a memory device that includes a plurality of memory blocks each of which includes a plurality of pages for storing data; and a controller that includes a first memory, wherein the controller performs a foreground operation and a background operation onto the memory blocks, checks priorities and weights for the foreground operation and the background operation, schedules queues corresponding to the foreground operation and the background operation based on the priorities and the weights, allocates regions corresponding to the scheduled queues to the first memory, and performs the foreground operation and the background operation through the regions allocated to the first memory."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory system for scheduling foreground and background operations, and operating method thereof","description":"A memory system includes: a memory device that includes a plurality of memory blocks each of which includes a plurality of pages for storing data; and a controller that includes a first memory, wherei","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10534705","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10534705","citation_suggestion":"Patentable. \"Memory system for scheduling foreground and background operations, and operating method thereof\" (US-10534705). https://patentable.app/patents/US-10534705","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10534705","json":"https://patentable.app/api/llm-context/US-10534705","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:25:49.677Z"}