{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10534747","patent":{"patent_number":"US-10534747","title":"Technologies for providing a scalable architecture for performing compute operations in memory","assignee":null,"inventors":[],"filing_date":"2019-03-29T00:00:00.000Z","publication_date":"2020-01-14T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06N","G06N","G06N","G06N"],"num_claims":20,"abstract":"Technologies for providing a scalable architecture to efficiently perform compute operations in memory include a memory having media access circuitry coupled to a memory media. The media access circuitry is to access data from the memory media to perform a requested operation, perform, with each of multiple compute logic units included in the media access circuitry, the requested operation concurrently on the accessed data, and write, to the memory media, resultant data produced from execution of the requested operation."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Technologies for providing a scalable architecture for performing compute operations in memory","description":"Technologies for providing a scalable architecture to efficiently perform compute operations in memory include a memory having media access circuitry coupled to a memory media. The media access circui","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10534747","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10534747","citation_suggestion":"Patentable. \"Technologies for providing a scalable architecture for performing compute operations in memory\" (US-10534747). https://patentable.app/patents/US-10534747","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10534747","json":"https://patentable.app/api/llm-context/US-10534747","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:52:17.361Z"}