{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10535670","patent":{"patent_number":"US-10535670","title":"Non-volatile memory having an erase gate formed between two floating gates with two word lines formed on other sides and a method for forming the same","assignee":null,"inventors":[],"filing_date":"2016-02-25T00:00:00.000Z","publication_date":"2020-01-14T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":20,"abstract":"A method of manufacturing a non-volatile memory is described. A substrate including a first region and a second region located at periphery of the first region is provided. A plurality of stacked structures are formed on the first region of the substrate. A wall structure is formed on the second region of the substrate. A conductive layer is formed over the substrate. A bottom anti-reflective coating is formed over the conductive layer. The bottom anti-reflective coating and the conductive layer are etched back. The conductive layer is patterned."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Non-volatile memory having an erase gate formed between two floating gates with two word lines formed on other sides and a method for forming the same","description":"A method of manufacturing a non-volatile memory is described. A substrate including a first region and a second region located at periphery of the first region is provided. A plurality of stacked stru","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10535670","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10535670","citation_suggestion":"Patentable. \"Non-volatile memory having an erase gate formed between two floating gates with two word lines formed on other sides and a method for forming the same\" (US-10535670). https://patentable.app/patents/US-10535670","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10535670","json":"https://patentable.app/api/llm-context/US-10535670","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T06:59:40.821Z"}