{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10535769","patent":{"patent_number":"US-10535769","title":"Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions","assignee":null,"inventors":[],"filing_date":"2019-03-08T00:00:00.000Z","publication_date":"2020-01-14T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":14,"abstract":"A semiconductor device including a channel region formed in a semiconductor substrate; a source region formed on one side of the channel region; a drain region formed on the other side of the channel region; a gate electrode formed on the channel region with a gate insulating film therebetween; and a stress-introducing layer that applies stress to the channel region, the semiconductor device having a stress distribution in which source region-side and drain region-side peaks are positioned between a pn junction boundary of the channel region and the source region and a pn junction boundary of the channel region and the drain region."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions","description":"A semiconductor device including a channel region formed in a semiconductor substrate; a source region formed on one side of the channel region; a drain region formed on the other side of the channel ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10535769","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10535769","citation_suggestion":"Patentable. \"Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions\" (US-10535769). https://patentable.app/patents/US-10535769","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10535769","json":"https://patentable.app/api/llm-context/US-10535769","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T13:23:15.964Z"}