{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10539611","patent":{"patent_number":"US-10539611","title":"Integrated circuit chip reliability qualification using a sample-specific expected fail rate","assignee":null,"inventors":[],"filing_date":"2017-11-03T00:00:00.000Z","publication_date":"2020-01-21T00:00:00.000Z","cpc_codes":["G05B","G05B","G05B","G05B"],"num_claims":20,"abstract":"Disclosed is a method for performing reliability qualification of manufactured integrated circuit (IC) chips. In the method, IC chips are manufactured according to a design and sorted into groups, which correspond to different process windows within a process distribution for the design. Group fail rates are determined for the groups. Reliability qualification of the manufactured IC chips is performed. Specifically, a sample of the IC chips is stress tested and the manufactured IC chips are qualified if the actual fail rate of the sample is no greater than an expected fail rate. The expected fail rate used is not, however, the expected overall fail rate for all the manufactured IC chips. Instead it is a unique expected fail rate for the specific sample itself and it is determined considering fail rate contributions from only those specific groups of IC chips from which the IC chips in the sample were selected."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integrated circuit chip reliability qualification using a sample-specific expected fail rate","description":"Disclosed is a method for performing reliability qualification of manufactured integrated circuit (IC) chips. In the method, IC chips are manufactured according to a design and sorted into groups, whi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10539611","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10539611","citation_suggestion":"Patentable. \"Integrated circuit chip reliability qualification using a sample-specific expected fail rate\" (US-10539611). https://patentable.app/patents/US-10539611","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10539611","json":"https://patentable.app/api/llm-context/US-10539611","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T17:42:37.330Z"}