{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10539989","patent":{"patent_number":"US-10539989","title":"Memory device alert of completion of internally self-timed power-up and reset operations","assignee":null,"inventors":[],"filing_date":"2017-03-14T00:00:00.000Z","publication_date":"2020-01-21T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F"],"num_claims":20,"abstract":"A memory device can include: a non-volatile storage register configured to store an active reset polling enable bit that corresponds to a reset operation; a controller configured to control execution of the reset operation on the memory device; an operation completion indicator configured to provide a reset recovery indication external to the memory device when the reset operation has completed and the active reset polling enable bit is set; and a command decoder configured to receive a command to be executed on the memory device in response to the reset recovery indication."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory device alert of completion of internally self-timed power-up and reset operations","description":"A memory device can include: a non-volatile storage register configured to store an active reset polling enable bit that corresponds to a reset operation; a controller configured to control execution ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10539989","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10539989","citation_suggestion":"Patentable. \"Memory device alert of completion of internally self-timed power-up and reset operations\" (US-10539989). https://patentable.app/patents/US-10539989","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10539989","json":"https://patentable.app/api/llm-context/US-10539989","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T19:37:08.438Z"}