{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10545804","patent":{"patent_number":"US-10545804","title":"Memory controller, memory system, and memory controller control method","assignee":null,"inventors":[],"filing_date":"2015-07-22T00:00:00.000Z","publication_date":"2020-01-28T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"[Object] To sufficiently reduce frequency of error occurrence in memory cells.[Solution] A reading unit reads read data from a memory cell, the read data including an information bit and reversal information for determining whether or not the information bit has been reversed. In addition, an error detection/correction unit detects the presence or absence of an error in the information bit and corrects the error. A data reversing unit reverses the information bit that has the error corrected and the reversal information. Furthermore, a writing unit writes the reversed information bit and the reversed reversal information in the memory cell."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory controller, memory system, and memory controller control method","description":"[Object] To sufficiently reduce frequency of error occurrence in memory cells.[Solution] A reading unit reads read data from a memory cell, the read data including an information bit and reversal info","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10545804","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10545804","citation_suggestion":"Patentable. \"Memory controller, memory system, and memory controller control method\" (US-10545804). https://patentable.app/patents/US-10545804","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10545804","json":"https://patentable.app/api/llm-context/US-10545804","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T07:34:43.542Z"}