{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10545860","patent":{"patent_number":"US-10545860","title":"Intelligent high bandwidth memory appliance","assignee":null,"inventors":[],"filing_date":"2017-10-27T00:00:00.000Z","publication_date":"2020-01-28T00:00:00.000Z","cpc_codes":["G06F","H01L","G06F","G06N","H01L","G06F","G06F","G06F","G06F","G06F","G11C","G11C","H01L"],"num_claims":23,"abstract":"Inventive aspects include An HBM+ system, comprising a host including at least one of a CPU, a GPU, an ASIC, or an FPGA; and an HBM+ stack including a plurality of HBM modules arranged one atop another, and a logic die disposed beneath the plurality of HBM modules. The logic die is configured to offload processing operations from the host. A system architecture is disclosed that provides specific compute capabilities in the logic die of high bandwidth memory along with the supporting hardware and software architectures, logic die microarchitecture, and memory interface signaling options. Various new methods are provided for using in-memory processing abilities of the logic die beneath an HBM memory stack. In addition, various new signaling protocols are disclosed to use an HBM interface. The logic die microarchitecture and supporting system framework are also described."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Intelligent high bandwidth memory appliance","description":"Inventive aspects include An HBM+ system, comprising a host including at least one of a CPU, a GPU, an ASIC, or an FPGA; and an HBM+ stack including a plurality of HBM modules arranged one atop anothe","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10545860","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10545860","citation_suggestion":"Patentable. \"Intelligent high bandwidth memory appliance\" (US-10545860). https://patentable.app/patents/US-10545860","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10545860","json":"https://patentable.app/api/llm-context/US-10545860","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T07:41:29.532Z"}