{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-10546623","patent":{"patent_number":"US-10546623","title":"Resistive memory device having memory cell array and system including the same","assignee":null,"inventors":[],"filing_date":"2018-11-19T00:00:00.000Z","publication_date":"2020-01-28T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"A resistive memory device includes a memory cell array in which a plurality of memory cells are arranged. Each of the plurality of memory cells includes a variable resistor comprising a first end connected to a bit line, and a second end, a row transistor connected between a row source line and the second end of the variable resistor, the row transistor being selectable by a row word line, and a column transistor connected between a column source line and the second end of the variable resistor, the column transistor being selectable by a column word line. Based on the row transistor being selected, first data is written or second data is read in a row direction of the memory cell array, and based on the column transistor being selected, the first data is written or the second data is read in a column direction of the memory cell array."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Resistive memory device having memory cell array and system including the same","description":"A resistive memory device includes a memory cell array in which a plurality of memory cells are arranged. Each of the plurality of memory cells includes a variable resistor comprising a first end conn","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-10546623","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-10546623","citation_suggestion":"Patentable. \"Resistive memory device having memory cell array and system including the same\" (US-10546623). https://patentable.app/patents/US-10546623","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-10546623","json":"https://patentable.app/api/llm-context/US-10546623","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T09:59:58.847Z"}