{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11233589","patent":{"patent_number":"US-11233589","title":"Margin test methods and circuits","assignee":null,"inventors":[],"filing_date":"2020-11-24T00:00:00.000Z","publication_date":"2022-01-25T00:00:00.000Z","cpc_codes":["H04B","G06F","H04B","H04L","H04L","H04L","H04L","H04L","H04L","H04L","H04L","H04B","H04L","H04L","H04L"],"num_claims":20,"abstract":"Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Margin test methods and circuits","description":"Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in rec","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11233589","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11233589","citation_suggestion":"Patentable. \"Margin test methods and circuits\" (US-11233589). https://patentable.app/patents/US-11233589","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11233589","json":"https://patentable.app/api/llm-context/US-11233589","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T15:37:11.189Z"}