{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11237827","patent":{"patent_number":"US-11237827","title":"Arithemetic logic unit register sequencing","assignee":null,"inventors":[],"filing_date":"2019-11-26T00:00:00.000Z","publication_date":"2022-02-01T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"A graphics processing unit (GPU) sequences provision of operands to a set of operand registers, thereby allowing the GPU to share at least one of the operand registers between processing. The GPU includes a plurality of arithmetic logic units (ALUs) with at least one of the ALUs configured to perform double precision operations. The GPU further includes a set of operand registers configured to store single precision operands. For a plurality of executing threads that request double precision operations, the GPU stores the corresponding operands at the operand registers. Over a plurality of execution cycles, the GPU sequences transfer of operands from the set of operand registers to a designated double precision operand register. During each execution cycle, the double-precision ALU executes a double precision operation using the operand stored at the double precision operand register."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Arithemetic logic unit register sequencing","description":"A graphics processing unit (GPU) sequences provision of operands to a set of operand registers, thereby allowing the GPU to share at least one of the operand registers between processing. The GPU incl","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11237827","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11237827","citation_suggestion":"Patentable. \"Arithemetic logic unit register sequencing\" (US-11237827). https://patentable.app/patents/US-11237827","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11237827","json":"https://patentable.app/api/llm-context/US-11237827","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T14:59:10.455Z"}