{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11237984","patent":{"patent_number":"US-11237984","title":"Memory system, memory controller and operating method thereof","assignee":null,"inventors":[],"filing_date":"2019-10-08T00:00:00.000Z","publication_date":"2022-02-01T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":12,"abstract":"Embodiments of the present invention relate to a memory system, a memory device, a memory controller and an operating method thereof. A partial mapping table including some of plural pieces of mapping information between physical addresses and logical addresses, which are included in a mapping table stored in the memory device, is cached, a piece of mapping information corresponding to data indicated by a command is referred to in the partial mapping table, and whether to perform an update for a reference-related parameter of the piece of mapping information is controlled depending on a size of the data, thereby improving cache efficiency for mapping informations for processing a request from a host and through this, increasing the success rate of a cache hit."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory system, memory controller and operating method thereof","description":"Embodiments of the present invention relate to a memory system, a memory device, a memory controller and an operating method thereof. A partial mapping table including some of plural pieces of mapping","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11237984","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11237984","citation_suggestion":"Patentable. \"Memory system, memory controller and operating method thereof\" (US-11237984). https://patentable.app/patents/US-11237984","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11237984","json":"https://patentable.app/api/llm-context/US-11237984","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T22:36:57.276Z"}