{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11238904","patent":{"patent_number":"US-11238904","title":"Using embedded switches for reducing capacitive loading on a memory system","assignee":null,"inventors":[],"filing_date":"2020-11-24T00:00:00.000Z","publication_date":"2022-02-01T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":20,"abstract":"Systems and methods disclosed herein are related to a memory system. In one aspect, the memory system includes a first set of memory cells and a second set of memory cells; a first group of switches, each including: a first electrode connected to first electrodes of the first subset of memory cells, and a second electrode; a second group of switches, each including: a first electrode connected to first electrodes of the second subset of memory cells, and a second electrode; and a third group of switches, each including: a first electrode connected to a first global bit line, and a second electrode connected to the second electrodes of the first group of switches and the second electrodes of the second group of switches."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Using embedded switches for reducing capacitive loading on a memory system","description":"Systems and methods disclosed herein are related to a memory system. In one aspect, the memory system includes a first set of memory cells and a second set of memory cells; a first group of switches, ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11238904","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11238904","citation_suggestion":"Patentable. \"Using embedded switches for reducing capacitive loading on a memory system\" (US-11238904). https://patentable.app/patents/US-11238904","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11238904","json":"https://patentable.app/api/llm-context/US-11238904","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T15:37:13.636Z"}