{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11238921","patent":{"patent_number":"US-11238921","title":"Packaged integrated circuit memory devices having enhanced on-die-termination circuits therein and methods of operating same","assignee":null,"inventors":[],"filing_date":"2020-04-14T00:00:00.000Z","publication_date":"2022-02-01T00:00:00.000Z","cpc_codes":["G11C","G06F","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":19,"abstract":"A memory device includes a pad region having a flag pad separated from an external host, and a signal pad connected to the external host. A bank region is provided having a plurality of memory cells therein. An on-die-termination (ODT) setting circuit is provided, which is configured to receive a control command including first data corresponding to termination resistance requested by the host, and a ODT enable signal. The setting circuit is configured to generate second data corresponding to the ODT resistance. An ODT enable circuit is provided, which is configured to output an ODT flag signal to the flag pad, in response to the control command and the ODT enable signal. A resistor circuit is provided, which is configured to connect the ODT resistance to the signal pad using the second data."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Packaged integrated circuit memory devices having enhanced on-die-termination circuits therein and methods of operating same","description":"A memory device includes a pad region having a flag pad separated from an external host, and a signal pad connected to the external host. A bank region is provided having a plurality of memory cells t","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11238921","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11238921","citation_suggestion":"Patentable. \"Packaged integrated circuit memory devices having enhanced on-die-termination circuits therein and methods of operating same\" (US-11238921). https://patentable.app/patents/US-11238921","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11238921","json":"https://patentable.app/api/llm-context/US-11238921","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-31T10:39:17.011Z"}