{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11238952","patent":{"patent_number":"US-11238952","title":"Memory system, memory controller, and method of operating memory system","assignee":null,"inventors":[],"filing_date":"2020-05-15T00:00:00.000Z","publication_date":"2022-02-01T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C"],"num_claims":16,"abstract":"A memory system performs Error Correcting Code (ECC) decoding on data read from a plurality of target memory cells of a memory device, determines whether to update a read bias used in read operations of the memory device according to results of the ECC decoding, and then may update a value of the read bias based on result data produced by the ECC decoding and the number of data bits corrected by the ECC decoding, thereby optimizing the read bias value according to a change in a threshold voltage distribution of the memory cell, and increasing the likelihood of success of the ECC decoding."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory system, memory controller, and method of operating memory system","description":"A memory system performs Error Correcting Code (ECC) decoding on data read from a plurality of target memory cells of a memory device, determines whether to update a read bias used in read operations ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11238952","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11238952","citation_suggestion":"Patentable. \"Memory system, memory controller, and method of operating memory system\" (US-11238952). https://patentable.app/patents/US-11238952","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11238952","json":"https://patentable.app/api/llm-context/US-11238952","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T18:02:15.499Z"}