{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11239140","patent":{"patent_number":"US-11239140","title":"Chip packaging structure with heat dissipation layer, flange and sealing pin","assignee":null,"inventors":[],"filing_date":"2018-12-20T00:00:00.000Z","publication_date":"2022-02-01T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":9,"abstract":"Disclosed a chip packaging structure and a manufacturing method thereof. The chip packaging structure comprises: a metal heat dissipation layer; a chip structure comprising a plurality of first electrical contacts on an upper surface of the chip structure; a pin layer comprising a plurality of second electrical contacts and a plurality of separate metal bumps; an encapsulant encapsulating at least one portion of the chip structure, the metal heat dissipation layer and the pin layer, wherein at least one portion of the pin layer is exposed to an upper surface of the encapsulant, and an lower surface of the metal heat dissipation layer is exposed outside the encapsulant. The metal heat dissipation layer includes a flange on the side surface for tightly combining the metal heat dissipation layer and the encapsulant."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Chip packaging structure with heat dissipation layer, flange and sealing pin","description":"Disclosed a chip packaging structure and a manufacturing method thereof. The chip packaging structure comprises: a metal heat dissipation layer; a chip structure comprising a plurality of first electr","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11239140","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11239140","citation_suggestion":"Patentable. \"Chip packaging structure with heat dissipation layer, flange and sealing pin\" (US-11239140). https://patentable.app/patents/US-11239140","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11239140","json":"https://patentable.app/api/llm-context/US-11239140","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T11:52:45.579Z"}