{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-11239227","patent":{"patent_number":"US-11239227","title":"Semiconductor devices, methods of designing layouts of semiconductor devices and methods of fabricating semiconductor devices","assignee":null,"inventors":[],"filing_date":"2018-08-20T00:00:00.000Z","publication_date":"2022-02-01T00:00:00.000Z","cpc_codes":["G06F","G06F","H01L","H01L","G06F","G06F","H01L","H01L","H01L","H01L","H01L"],"num_claims":18,"abstract":"A semiconductor device is provided. The semiconductor device includes a first hard macro; a second hard macro spaced apart from the first hard macro in a first direction by a first distance; a head cell disposed in a standard cell area between the first hard macro and the second hard macro, the head cell being configured to perform power gating of a power supply voltage provided to one from among the first hard macro and the second hard macro; a plurality of first ending cells disposed in the standard cell area adjacent to the first hard macro; and a plurality of second ending cells disposed in the standard cell area adjacent to the second hard macro, the head cell not overlapping the plurality of first ending cells and the plurality of second ending cells."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor devices, methods of designing layouts of semiconductor devices and methods of fabricating semiconductor devices","description":"A semiconductor device is provided. The semiconductor device includes a first hard macro; a second hard macro spaced apart from the first hard macro in a first direction by a first distance; a head ce","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-11239227","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-11239227","citation_suggestion":"Patentable. \"Semiconductor devices, methods of designing layouts of semiconductor devices and methods of fabricating semiconductor devices\" (US-11239227). https://patentable.app/patents/US-11239227","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-11239227","json":"https://patentable.app/api/llm-context/US-11239227","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-05-30T23:54:56.812Z"}